Learning Outcomes:
On completion of this module, students will be able to:
- Apply theory and frameworks to take a product concept through the latter stages of the design & innovation life cycle.
Design and Innovation II (MEEN40840)
Curricular information is subject to change.
This module is the second of two intensive modules (following on from Design and Innovation I) delivered over a period of three weeks in trimester three (mid June to early July) which focuses on the latter stage of the design and innovation lifecycle, i.e. developing the product concept into a new business venture.
The aim of this module is to help Engineering Management students to identify and develop the skill-sets they would require to take a product from concept stage through to full market launch (e.g. feasibility analysis, idea protection through novelty and intellectual property, commercialisation).
The aim of this module is to help Engineering Management students to identify and develop the skill-sets they would require to take a product from concept stage through to full market launch (e.g. feasibility analysis, idea protection through novelty and intellectual property, commercialisation).
About this Module
Student Effort Hours:
| Student Effort Type | Hours |
|---|---|
| Lectures | 12 |
| Seminar (or Webinar) | 12 |
| Specified Learning Activities | 76 |
| Total | 100 |
Approaches to Teaching and Learning:
Not yet recordedRequirements, Exclusions and Recommendations
Learning Requirements:MEEN40080 Design & Innovation I
Module Requisites and Incompatibles
Pre-requisite:MEEN40810 - Design & Innovation I
Additional Information:
This is the second of two linked modules (Design & Innovation I and Design & Innovation II). Students must successfully complete Design & Innovation I before commencing Design & Innovation II.
Assessment Strategy
| Description | Timing | Component Scale | % of Final Grade | |||
|---|---|---|---|---|---|---|
| Continuous Assessment: Project | Throughout the Trimester | n/a | Graded | No | 100 |
Carry forward of passed components
Not yet recordedNot yet recorded |
Not yet recorded