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Curricular information is subject to change
Gain skills to design core analog circuits in CMOS integrated circuits.
Gain analogue design experience in Cadence CAD tools.
|Student Effort Type||Hours|
|Specified Learning Activities||
|Autonomous Student Learning||
|Computer Aided Lab||
Basic signals & systems, circuit theory and analog electronic circuits.
|Description||Timing||Component Scale||% of Final Grade|
|Examination: Final exam||2 hour End of Trimester Exam||No||Standard conversion grade scale 40%||No||
|Project: Final circuit design project||Week 12||n/a||Standard conversion grade scale 40%||No||
|Assignment: Homework assignments, lab reports||Throughout the Trimester||n/a||Standard conversion grade scale 40%||No||
|Resit In||Terminal Exam|
|Spring||Yes - 2 Hour|
• Feedback individually to students, post-assessment
Not yet recorded.
|Dr Teerachot Siriburanon||Lecturer / Co-Lecturer|