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Curricular information is subject to change
On successful completion of this module, students should be able to:
1. Design a complex digital system, involving an embedded processor and other hardware;
2. Write software for an embedded system;
3. Use appropriate software tools in the design and verification of such systems;
4. Work in a team and collaborate effectively with other members of the team;
5. Maintain proper documentation and communicate the results of their work.
1 - A brief introduction to embedded systems and to the module;
2 - Programming in assembly language, using an 8-bit microcontroller as an example;
3 - Microcontroller hardware, using the same 8-bit microcontroller as an example;
4 - Interfaces in embedded systems, including serial bus protocols;
5 - Programming in C for embedded systems (assuming knowledge of C programming);
6 - Processor bus structures, in general and using AMBA examples;
7 - Review of hardware design at register transfer level and hardware description language (assuming prior knowledge);
8 - Microcontroller hardware and instruction set, using ARM 32-bit microcontrollers as examples;
9 - A brief introduction to caches as used in embedded systems;
10 - A brief introduction to operating systems, with emphasis on embedded systems;
11 - Embedded system design.
|Student Effort Type||Hours|
|Specified Learning Activities||
|Autonomous Student Learning||
Digital system design at register transfer level is required. Knowledge of a hardware description language is also required. Verilog or SystemVerilog is preferred, but VHDL is acceptable. As an example, the module EEEN30190 Digital System Design provides the required prior knowledge.
Computer programming in C is required. As an example, the module EEEN20010 Computer Engineering provides the required prior knowledge.
|Description||Timing||Component Scale||% of Final Grade|
|Examination: Open-book written examination||2 hour End of Trimester Exam||Yes||Standard conversion grade scale 40%||No||
|Assignment: Design assignments during the trimester.||Throughout the Trimester||n/a||Graded||No||
|Resit In||Terminal Exam|
• Feedback individually to students, post-assessment
For assignments, each student will submit a report and receive feedback on the report and on the assignment. For the terminal exam, students may request a script viewing (or equivalent if the exam is online).
|Dr Barry Cardiff||Lecturer / Co-Lecturer|
|Lecture||Offering 1||Week(s) - 19, 20, 21, 22, 23, 24, 25, 28, 29, 30, 32||Fri 14:00 - 14:50|
|Lecture||Offering 1||Week(s) - 19, 20, 21, 22, 23, 24, 25, 28, 29, 30, 31||Mon 10:00 - 10:50|
|Tutorial||Offering 1||Week(s) - 19, 20||Tues 11:00 - 12:50|
|Laboratory||Offering 1||Week(s) - 19, 20, 21, 22, 23, 24, 25, 28, 29, 30, 31, 32||Thurs 11:00 - 13:50|
|Laboratory||Offering 2||Week(s) - 19, 20, 21, 22, 23, 24, 25, 28, 29, 30, 31, 32||Wed 09:00 - 11:50|