Learning Outcomes:
On completion of this module students are expected to:
• Understand the relationship between Boolean logic and circuit design.
• Design simple combinational circuits.
• Use binary number systems for calculation
• Use Karnaugh maps to simplify logic.
• Design simple sequential circuits.
• Interpret timing diagrams.
• Understand the behaviour of basic synchronous components such as D and JK-flip-flops.
• Design Mealy and Moore Finite State Machines.
• Understand how memory systems work.
• Understand for digital design issues.
Indicative Module Content:
Lectures 1-2:
Recap on electricity and key properties of electrical circuits. Basic overview of how logic gates are constructed from transistors. Review of Boolean logic gates and truth tables.
Lectures 3-9:
Students learn how to design combinational logic circuits using Boolean logic gates. The design process is discussed together with design techniques, such as Karnaugh Maps. The relationship with Boolean algebra is explained with examples. Students also lean how to calculate the area and delay of circuits.
Lectures 10-17:
Student learn about the function, operation and design of memory circuits, including latches, flip- flops. ROMs and RAMs. They learn how to design Finite State Machines. Timing issues involving synchronous circuits are discussed.
Lectures 18-24:
Students learn how to design functional blocks, such as arithmetic circuits. Commonly used fixed and floating point number systems are described. Basic input and output devices are described. Student knowledge is integrated by means of system case studies.
Graded Assessment 1:
Design and implement basic electrical circuits including LED, resistors, digital integrated circuits and other components in an online electrical circuit simulator and Logisim-evolution digital circuit simulator application.
Graded Assessment 2:
Design and implementation of combinational logic circuits using the Karnaugh map method.
Graded Assessment 3:
Design and implementation of small digital systems controlled by Finite State Machines
Graded Assessment 4:
Design and implementation of binary arithmetic circuits.
Design and implementation of a mini computing machine.
Final End of Trimester Examination:
2 hours covering all aspects of the module.