EEEN2005J Circuits and Systems.

Academic Year 2024/2025

Restriction: Beijing-based students only.

This module is intended to be a first module in the field of electronics.
It develops many of the theory and principles required for more complex circuit analysis and design.

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Curricular information is subject to change

Learning Outcomes:

On successful completion of this module the student should be able to:
1. Analyse circuits involving resistors, capacitors, voltage sources, current sources, op-amps, etc., using the appropriate techniques;
2. Design simple circuits to meet given specifications, and build these circuits on breadboard.
3. Analyse and design amplifier circuits using the op-amp as a building block.
4. Analyse and design simple filter circuits.
5. Choose appropriate techniques for processing analogue signals and converting them to digital form.

Indicative Module Content:

- Introduction to electronics
- basic definitions of voltage, current and power.
- Kirchhoff's circuit laws
- elementary passive circuit elements resistors, capacitors, inductors
- voltage and current sources (independent and controlled)
- op-amps
- transformers
- diodes along with the various analysis techniques
- phasor domain analysis for linear time-invariant circuits with sinusoidal inputs
- Introduction to basic techniques for processing analogue signals, such as amplifiers and filters, and methods of converting between analogue and digital signals.

Student Effort Hours: 
Student Effort Type Hours
Lectures

36

Laboratories

16

Autonomous Student Learning

65

Total

117

Approaches to Teaching and Learning:
Lectures where material is explained coupled with Labs where the students see first had the principles.
 
Requirements, Exclusions and Recommendations
Learning Recommendations:

EEEN1002J Introduction to Electronic Systems


Module Requisites and Incompatibles
Additional Information:
This module is delivered overseas and is not available to students based at the UCD Belfield or UCD Blackrock campuses


 
Assessment Strategy  
Description Timing Component Scale Must Pass Component % of Final Grade In Module Component Repeat Offered
Report(s): 3 labs throughout the trimester Week 4, Week 8, Week 12 Alternative linear conversion grade scale 40% No

30

No
Exam (In-person): End-term exam End of trimester
Duration:
2 hr(s)
Alternative linear conversion grade scale 40% Yes

70

Yes

Carry forward of passed components
Yes
 
Remediation Type Remediation Timing
In-Module Resit Prior to relevant Programme Exam Board
Please see Student Jargon Buster for more information about remediation types and timing. 
Feedback Strategy/Strategies

• Group/class feedback, post-assessment

How will my Feedback be Delivered?

Not yet recorded.

Name Role
Dr Barry Cardiff Lecturer / Co-Lecturer
Dr Avishek Nag Lecturer / Co-Lecturer
Dr Xiping Wu Lecturer / Co-Lecturer
Mr Michael Garvey Tutor