Learning Outcomes:
Gain skills to design core analog circuits in CMOS integrated circuits.
Gain analogue design experience in Cadence CAD tools.
Curricular information is subject to change.
Gain skills to design core analog circuits in CMOS integrated circuits.
Gain analogue design experience in Cadence CAD tools.
Student Effort Type | Hours |
---|---|
Lectures | 24 |
Computer Aided Lab | 24 |
Specified Learning Activities | 36 |
Autonomous Student Learning | 24 |
Total | 108 |
Basic signals & systems, circuit theory and analog electronic circuits.
Resit In | Terminal Exam |
---|---|
Spring | Yes - 2 Hour |
• Feedback individually to students, post-assessment
Not yet recorded.
Name | Role |
---|---|
Dr Minh Hieu Nguyen | Lecturer / Co-Lecturer |
Dr Viet Nguyen | Lecturer / Co-Lecturer |
Dr Teerachot Siriburanon | Lecturer / Co-Lecturer |